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iCE65 mobileFPGA Family Overview

iCE65™mobileFPGA™ Family Overview

Designers of handheld, battery-based consumer products have long awaited a programmable logic solution that delivers design flexibility and fast time-to-market benefits coupled with features that address their power, logic capacity, cost, and small form factor requirements. This solution, previously unattainable by other FPGA suppliers, is now provided by SiliconBlue's ultra-low power iCE65™ mobileFPGA™ devices.

The iCE65 ultra-low power, ASIC-like, single-chip, SRAM mobileFPGA family has set new standards for programmable logic solutions by combining ultra low power, low cost and small form factor into a single-chip solution. The portfolio offers a full spectrum of device options optimized for logic density, power, I/O count and package size. Dissipating power as low as 12µW make the iCE65 mobileFPGA devices ideal for applications where optimizing or extending battery life is key. Logic capacity ranges from ~60K to ~800K FPGA system gates, I/O counts from 48 to 222, and package sizes as small as 3mm by 4mm provide the best solution for each logic design need.

Part Number L01 L04 L08 L161
Logic Cells 1,280 3,520 7,680 16,896
System Gate Equivalent 60K 200K 400K 800K
Embedded RAM Bits 64K 80K 128K 384K
Embedded RAM 4K Blocks 16 20 32 96
Phase-Locked Loop 0 0 0 0
Power/Speed Grade
(-L@1.0V, -T@1.2V)
-L -T
-L -T
-L -T
-L -T
Core Operating Current, 0 KHz
12 µA 19 µA
26 µA 43 µA
54 µA 90 µA  
TBD TBD
Core Operating Current, 32 KHz
15 µA 23 µA
31 µA 50 µA
62 µA 100 µA
TBD TBD
Core Operating Current, 32 MHz
3 mA 4 mA
7 mA 8 mA
14 mA 17 mA  
TBD TBD
Configuration Bits 245K 533K 1,057K TBD
Package Programmable I/O: Max I/O (LVDS Channels)
84-pin QFN 67 (0)      
100-pin VQFP 72 (0) 72 (9)    
132-ball BGA 93 (0) 95 (11)    
196-ball BGA   150 (18) 150 (18)  
284-ball BGA   176 (20) 222 (25)  
DiePlus™ Programmable I/O: Max I/O (LVDS Channels)
Wafer Level Chip Scale Package: WLCSP CS36
24(0)
CS63
48 (4)
CC72
55 (8)
 
Known Good Die 95 (0) 176 (20) 222 (25)  

Part Number P04 P081 P121
Logic Cells 3,520 7,680 12,160
System Gate Equivalent 200K 400k 600k
Embedded RAM Bits 80K 128k 160k
Embedded RAM 4K Blocks 20 32 40
Phase-Locked Loop 1 2 2
Power/Speed Grade(-L@1.0V, -T@1.2V) -T -T -T
Core Operating Current, 0 KHz 43 µA TBD TBD
Core Operating Current, 32 KHz 60 µA TBD TBD
Core Operating Current, 32 MHz 9 mA TBD TBD
Configuration Bits 533k TBD TBD
Package Programmable I/O: Max I/O (LVDS Channels)
84-pin QFN      
100-pin VQFP      
132-ball BGA      
196-ball BGA 148 (18)    
284-ball BGA 174 (20)    
DiePlus™ Programmable I/O: Max I/O (LVDS Channels)
Wafer Level Chip Scale Package: WLCSP      
Known Good Die 174 (20)    

Note 1: Consult factory for additional information


Low standby power without the recovery time

A large number of handheld applications have a 32 kHz standby mode in order to meet green power requirements. Most FPGA solutions today require some form of power-down mode, with an associated recovery time that ranges from microseconds to milliseconds. iCE65 ultra-low power mobileFPGA devices, dissipating power as low as 12 µW, allow battery-based applications to run in standby mode and monitor external stimuli such as keyboard clicks to wake up. There is no recovery time and the application responds instantaneously. The below figure illustrates that at any speed the iCE65 ultra-low power mobileFPGA devices consume low power enabling extended battery life for mobile applications.


iCE65 mobileFPGA devices extend battery life of mobile applications by consuming low power at any speed. Static power is achieved without a special sleep mode and without a prolonged wake up time.

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iCE65 Product Table
iCE65 mobileFPGA Brochure
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