|
|
Home >> Products >> Devices >> DiePlus Advantage
DiePlus Advantage
Designers of handheld mobile applications have a number of objectives that they must meet. With the iCE65™ mobileFPGA™ family, SiliconBlue offers a semiconductor solution that is truly aligned with their objectives. By offering devices that are ultra low power, have maximum logic capacity, and utilize advanced technologies to offer ASIC-like costs, iCE65 devices are a truly targeted product offering.
SiliconBlue recognizes that product offerings alone paint an incomplete picture. Un-packaged devices (also known as Known Good Die, or KGD) offer many benefits, including minimal board space and cost. However, designers have to consider manufacturing issues when utilizing KGD. Balancing these trade-offs can be very difficult.
DiePlus Advantage is SiliconBlue's focused program to provide designers with an optimal device mounting solution for mobile handheld applications. The DiePlus Advantage offers the following capabilities:
- Smallest possible board footprint
- Mechanical package structures such as lead frames and heat slugs are eliminated, as well plastic encapsulation
- Available as known-good die (KGD) or bumped die using wafer-level chip scale (WLCSP) packaging technology
- Lowest cost solution, eliminating costs associated with encapsulated packages
- Up to 90% less weight than equivalent pin count packaged devices
- WLCSP redirection layer technology exhibits excellent electrical characteristics
- No signal integrity issues often associated with mounting substrates
- Robust electrical connections minimize resistance and inductance
- Very flexible delivery options for KGD
- Whole wafer uncut, with wafer map
- Cut wafer mounted on blue tape, with wafer map
- KGD on tape and reel
- KGD in waffle pack
- Selectable die thickness: 4.0, 10.0, or 31.0 mil
- WLCSP technology eliminates need for KGD manufacturing flow
- Devices use standard PCB reflow mounting methods
- Eliminates need for wire bonding and lead frames
- Available in 0.4mm pitch (CS) or 0.5mm pitch (CC)
- Laser etched custom marking available for WLCSP devices
- Full wafer custom programming of Non-Volatile Configuration Memory (NVCM) available
iCE65 mobileFPGA DiePlus Advantage
 |
| Part Number |
L01 |
L04 |
L08 |
L161 |
| Logic Cells |
1,280 |
3,520 |
7,680 |
16,896 |
| DiePlus™ |
Programmable I/O: Max I/O (LVDS Channels) |
| Wafer Level Chip Scale Package: WLCSP |
CS36
25 (0) |
CS63
48 (4) |
CC72
55 (8)
CS110
92 (12) |
|
| Known Good Die |
95 (0) |
176 (20) |
222 (25) |
|
 |
| Part Number |
P04 |
P081 |
P121 |
| Logic Cells |
3,520 |
7,680 |
12,160 |
| DiePlus™ |
Programmable I/O: Max I/O (LVDS Channels) |
| Wafer Level Chip Scale Package: WLCSP |
|
|
|
| Known Good Die |
174 (20) |
|
|
| Notes: 1. Consult Factory |
|
|
|
Cut / Uncut Wafer Options
SiliconBlue offers both cut and uncut wafers for its known good die program. Options include
- W: Whole wafer, uncut with wafer map
- B: Whole wafer, sawed, with wafer map, mounted on blue tape
- T: Tape and reel, good die only
- P: Waffle pack, good die only
To see the available combinations of cut/uncut die and die thickness options, see Table 1.
Die Thickness Options
SiliconBlue offers different wafer/die thickness ordering options for its known good die program. Wafer/die thicknesses include 4.0 mil, 10.0 mil and 31.0 mil. To see the available combinations of cut/uncut die and die thickness options, see Table 1.
Die Thickness |
W |
B |
T |
P |
4.0 mil |
NO |
YES |
YES |
YES |
10.0 mil |
NO |
YES |
YES |
YES |
31.0 mil |
YES |
NO |
NO |
NO |
|
Table 1: Die Thickness Options and Die Cut Options
Bumped Die (Wafer Level Chip Scale Packaging)
Compared to standard surface-mount packaging, WLCSPs also provide reduced chip-to-PCB inductance and improved thermal dissipation. In addition, all package dimensions meet industry standard JEDEC/EIAJ pitches, making them directly compatible with SMT assembly and test requirements. Delivery options include tape and reel, and waffle pack.
In-House Programming
SiliconBlue offers high-volume device programming services for both bare die and bumped die products. By utilizing in-house programming services to program the non-volatile configuration memory (NVCM) with your custom pattern, you can assemble bare die or bumped die quickly without the need to introduce programming steps in your manufacturing process.
Custom Marking
SiliconBlue offers laser etched custom labeling for Wafer Level Chip Scale Packaged and other packaged devices. Contact your local sales person for details.
|
|