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Home >> Technology >> Non-Volatile Configuration Memory
Non-Volatile Configuration Memory
SRAM-based FPGA devices require configuration of their logic system from a memory source. Traditional SRAM-based FPGAs utilize an external memory source, which results in additional costs. In addition, this approach makes the application less secure from cloning due to bit-stream snooping since the configuration bit stream can be intercepted.
With the iCE65™ mobileFPGA™ device family, SiliconBlue has taken the approach of integrating the configuration memory on the die itself by utilizing a patented non-volatile memory. This non-volatile configuration memory (NVCM) does not require any modification of standard CMOS logic processes, nor does it add any additional package assembly or interconnection costs associated with multi-die solutions. By utilizing NVCM, SiliconBlue devices offer a single-device solution that has significant cost, yield, and usability advantages over methods that utilize embedded FLASH or EEPROM which require special wafer processing.
Figure 1 illustrates the NVCM memory cell array structure. The transistor labeled WP is used to store the digital information. If the data is "0" the WP transistor is left intact. If the data is "1", it's gate is programmed to be conductive to the underlying transistor channel. A second transistor labeled WR gate serves to isolate the WP transistor from the column bitline (shown vertically).
There were two major considerations taken in developing SiliconBlue's NVCM.
- The memory cell must program rapidly: gate dielectric breakdown time is achieved in a short time
- Other cells must remain unaffected: voltage and time exposure bust be low
To accomplish these goals, the memory cell nodes are carefully biased, so that only the cell being programmed received the required voltage and time needed for programming.
A typical NVCM memory cell cross section and current-voltage characteristics are illustrated in the figure below. The graph shows the cell current-voltage behavior in its '0' and '1' states. In the case of a '0' bit, the dielectric under the WP gate is intact and insulating. In the '1' state, a small conductive region exists between the WP gate and the underlying silicon. The conductive region allows current to flow from the WP gate, under the WR transistor, to the bitline. Circuits connected to the bitline sense the current and decipher the level into a logical '0' or '1.' Essentially zero current flows in the '0' state, while substantial current is present in the '1' state. Voltages used for reading the current are kept low, so that cells remain reliable for well past 10 years of constant reading. Likewise, programming voltages are applied through a patented process, carefully engineered to create the conductive channel only in the single cell being programmed.
NVCM Reliability
SiliconBlue has paid close attention to the inherent reliability of its products from the process and design phases to final product testing. Studies show that the NVCM memory cell and its associated circuitry are more reliable than alternative NVM memory. Tests show that programmed and unprogrammed cells will not switch electrical state during the product lifetime. As NVCM memory does not store charge, it is immune to mobile ion contamination, UV light, and similar ionic and radiation exposure, which can affect floating gate and SONOS type memory. The conductive dielectric region is constrained to very small volumes, as the gate dielectric is below 40 angstroms thick, and in practice the conductive region cannot be detected by optical or SEM means, configuration data is highly secure.
In contrast to charge storage based non-volatile memory (NVM), the SiliconBlue NVCM depends instead on dielectric conductivity modification. The NVCM dielectric conductivity mechanism is free from mobile ion contamination, and radiation concerns over charge loss. Extensive reliability tests show that unmodified gate dielectric, utilized to create the logical '0' state, has outstanding reliability under NVCM read conditions. Studies also show the NVCM logical '1' state is also reliable. Research shows that programmed memory cells become slightly more conductive during a high temperature bake tests, and withstand thousands of hours at 150C they do not revert back to the insulating '0' state.
Further ensuring the reliability of its configuration memory, SiliconBlue Technologies prevents against unforeseen random errors using well-established error correction methods. These methods ensure that single bit errors of either the '0' or '1' state are corrected. This additional engineering for reliability assures that throughout the intended life of our products, the NVCM memory used to configure the FPGA will remain accurate, and the FPGA will function properly.
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