Logic Capacity

As more and more features are added to handheld products, the complexity of the underlying hardware platform has increased dramatically. This added complexity, coupled with ever-increasing time-to-market pressure, has created a need for flexible hardware with more logic capacity than what is being offered by CPLDs.

The growth of FPGAs in the late 1990's was driven by the communications market explosion, but was enabled by the gate efficiency of the FPGA architecture. Unlike FLASH-based devices that require process-specific circuitry to operate as logic, SRAM-based FPGAs are able scale their logic capacity efficiently according to Moore's Law. This allowed FPGA devices to leverage advanced process geometries to effectively compete against gate arrays and standard cell ASICs. Because of this fundamental benefit, SRAM-based FPGA devices have far eclipsed FLASH-based devices in today's market place.

SiliconBlue's iCE65™ mobileFPGA™ bring this gate efficiency to the handheld mobile market. They are manufactured on a standard 65-nm CMOS process, offering the industry's highest logic capacity in small form factor packages.

As illustrated in Figure 1, the iCE65 mobile device family delivers more than 13x the logic capacity compared to its nearest competitor for small package sizes, making them true ASIC alternatives.

Figure 1 - iCE65 mobileFPGA device offer over 13x more logic capacity for a given board area than its nearest competitor, making them true ASIC alternatives.

Logic Capacity

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